VGA
Estudiantes de ingeniería electrónica de octavo semestre con conocimientos en programación básica en lenguaje VHDL con conocimiento en generación de memorias ROM, CONTADORES, REGISTROS, MULTIPLEXORES Y DEMULTIPLEXORES, DIVISORES DE RELOJ, manejo de entradas y salidas de la FPGA creación de modelos esquemáticos a través de código VHDL, tipos de MAQUINAS DE ESTADO manejo de salida de video VGA. 
CODIGO
library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity vga_controller is Port ( clk : in std_logic; -- 50 MHz clock rst : in std_logic; -- reset signal Enable : in std_logic; -- Enable --Slides : in std_logic_vector(3 downto 0); hs : out std_logic; -- Horizontal sync pulse. Active low vs : out std_logic; -- Vertical sync pulse. Active low --int : in std_logic_vector(7 downto 0); rojo : out std_logic_vector(2 downto 0); verde : out std_logic_vector(2 downto 0); azul : out std_logic_vector(1 downto 0) ); end vga_controller; architecture Behavioral of vga_controller is Component rominfr is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end component; Component rom_cero is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_uno is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_dos is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_tres is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_cuatro is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_cinco is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_seis is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_ocho is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_nueve is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_diez is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_once is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_doce is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_trece is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_catorce is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_quince is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_dieciseis is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_diecisiete is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_dieciocho is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_diecinueve is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_veinte is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_veintiuno is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_veintidos is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_veintitres is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_veinticuatro is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; Component rom_veinticinco is generic ( bits : integer := 4; -- number of bits per ROM word addr_bits : integer := 3); -- 2^addr_bits = number of words in ROM port (a : in std_logic_vector(addr_bits-1 downto 0); do : out std_logic_vector(bits-1 downto 0)); end Component; --800 horizontal pixels indexed 0 to 799 --525 vertical pixels indexed 0 to 524 constant hpixels : std_logic_vector(9 downto 0) := "1100011111"; --799 constant vlines : std_logic_vector(9 downto 0) := "1000001100"; --524 --horizontal pixel and vertical line counters signal hc, vc : std_logic_vector(9 downto 0); signal clkdiv : std_logic; signal reset : std_logic; signal reset_num : std_logic; --signal indicates if ok to display color for a pixel --signal display : std_logic; signal Slides: std_logic_vector(4 downto 0); signal DireccionROM: std_logic_vector(2 downto 0); signal Dato_Leido_ROM: std_logic_vector(3 downto 0); --Cero signal DireccionCero: std_logic_vector(2 downto 0); signal Dato_Cero_ROM: std_logic_vector(3 downto 0); --Uno signal DireccionUno: std_logic_vector(2 downto 0); signal Dato_Uno_ROM: std_logic_vector(3 downto 0); --Dos signal DireccionDos: std_logic_vector(2 downto 0); signal Dato_Dos_ROM: std_logic_vector(3 downto 0); --Tres signal DireccionTres: std_logic_vector(2 downto 0); signal Dato_Tres_ROM: std_logic_vector(3 downto 0); --Cuatro signal DireccionCuatro: std_logic_vector(2 downto 0); signal Dato_Cuatro_ROM: std_logic_vector(3 downto 0); --Cinco signal DireccionCinco: std_logic_vector(2 downto 0); signal Dato_Cinco_ROM: std_logic_vector(3 downto 0); --Seis signal DireccionSeis: std_logic_vector(2 downto 0); signal Dato_Seis_ROM: std_logic_vector(3 downto 0); --Siete signal DireccionSiete: std_logic_vector(2 downto 0); signal Dato_Siete_ROM: std_logic_vector(3 downto 0); --Ocho signal DireccionOcho: std_logic_vector(2 downto 0); signal Dato_Ocho_ROM: std_logic_vector(3 downto 0); --Nueve signal DireccionNueve: std_logic_vector(2 downto 0); signal Dato_Nueve_ROM: std_logic_vector(3 downto 0); --Diez signal DireccionDiez: std_logic_vector(2 downto 0); signal Dato_Diez_ROM: std_logic_vector(3 downto 0); --once signal DireccionOnce: std_logic_vector(2 downto 0); signal Dato_Once_ROM: std_logic_vector(3 downto 0); --doce signal DireccionDoce: std_logic_vector(2 downto 0); signal Dato_Doce_ROM: std_logic_vector(3 downto 0); --trece signal DireccionTrece: std_logic_vector(2 downto 0); signal Dato_Trece_ROM: std_logic_vector(3 downto 0); --catorce signal DireccionCatorce: std_logic_vector(2 downto 0); signal Dato_Catorce_ROM: std_logic_vector(3 downto 0); --quince signal DireccionQuince: std_logic_vector(2 downto 0); signal Dato_Quince_ROM: std_logic_vector(3 downto 0); --- Código Bien Hasta el 16 signal DireccionDieciseis: std_logic_vector(2 downto 0); signal Dato_Dieciseis_ROM: std_logic_vector(3 downto 0); --diecisiete signal DireccionDiecisiete: std_logic_vector(2 downto 0); signal Dato_Diecisiete_ROM: std_logic_vector(3 downto 0); --dieciocho signal DireccionDieciocho: std_logic_vector(2 downto 0); signal Dato_Dieciocho_ROM: std_logic_vector(3 downto 0); --diecinueve signal DireccionDiecinueve: std_logic_vector(2 downto 0); signal Dato_Diecinueve_ROM: std_logic_vector(3 downto 0); --veinte signal DireccionVeinte: std_logic_vector(2 downto 0); signal Dato_Veinte_ROM: std_logic_vector(3 downto 0); --catorce signal DireccionVeintiuno: std_logic_vector(2 downto 0); signal Dato_Veintiuno_ROM: std_logic_vector(3 downto 0); --quince signal DireccionVeintidos: std_logic_vector(2 downto 0); signal Dato_Veintidos_ROM: std_logic_vector(3 downto 0); --catorce signal DireccionVeintitres: std_logic_vector(2 downto 0); signal Dato_Veintitres_ROM: std_logic_vector(3 downto 0); --quince signal DireccionVeinticuatro: std_logic_vector(2 downto 0); signal Dato_Veinticuatro_ROM: std_logic_vector(3 downto 0); -- veinticinco signal DireccionVeinticinco: std_logic_vector(2 downto 0); signal Dato_Veinticinco_ROM: std_logic_vector(3 downto 0); --Máquina de Estado Type FSM is (Num0, Num1, Num2, Num3, Num4, Num5, Num6, Num7, Num8, Num9, Num10, Num11, Num12, Num13, Num14, Num15, Num16, Num17, Num18, Num19, Num20, Num21, Num22, Num23, Num24, Num25); Signal S_FSM: FSM; Signal Cuenta: std_logic_vector(25 downto 0):=(others =>'0'); Signal Bandera: std_logic; Type FSM_FF is (Estado1, Estado2); Signal S_FSM_FF: FSM_FF; begin reset<='0'; CeroROM: rom_cero generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionCero, do=>Dato_Cero_ROM); UnoROM: rom_uno generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionUno, do=>Dato_Uno_ROM); DosROM: rom_dos generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionDos, do=>Dato_Dos_ROM); TresROM: rom_tres generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionTres, do=>Dato_Tres_ROM); CuatroROM: rom_cuatro generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionCuatro, do=>Dato_Cuatro_ROM); CincoROM: rom_cinco generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionCinco, do=>Dato_Cinco_ROM); SeisROM: rom_seis generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionSeis, do=>Dato_Seis_ROM); SieteROM: rominfr generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionSiete, do=>Dato_Siete_ROM); OchoROM: rom_ocho generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionOcho, do=>Dato_Ocho_ROM); NueveROM: rom_nueve generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionNueve, do=>Dato_Nueve_ROM); diezROM: rom_diez generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionDiez, --Mayuscula do=>Dato_Diez_ROM);--Mayuscula onceROM: rom_once generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionOnce, do=>Dato_Once_ROM); doceROM: rom_doce generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionDoce, do=>Dato_Doce_ROM); treceROM: rom_trece generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionTrece, do=>Dato_Trece_ROM); catorceROM: rom_catorce generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionCatorce, do=>Dato_Catorce_ROM); quinceROM: rom_quince generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionQuince, do=>Dato_Quince_ROM); dieciseisROM: rom_dieciseis generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionDieciseis, do=>Dato_Dieciseis_ROM); diecisieteROM: rom_diecisiete generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionDiecisiete, do=>Dato_Diecisiete_ROM); dieciochoROM: rom_dieciocho generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionDieciocho, do=>Dato_Dieciocho_ROM); diecinueveROM: rom_diecinueve generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionDiecinueve, do=>Dato_Diecinueve_ROM); veinteROM: rom_veinte generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionVeinte, do=>Dato_Veinte_ROM); veintiunoROM: rom_veintiuno generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionVeintiuno, do=>Dato_Veintiuno_ROM); veintidosROM: rom_veintidos generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionVeintidos, do=>Dato_Veintidos_ROM); veintitresROM: rom_veintitres generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionVeintitres, do=>Dato_Veintitres_ROM); veinticuatroROM: rom_veinticuatro generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionVeinticuatro, do=>Dato_Veinticuatro_ROM); veinticincoROM: rom_veinticinco generic map ( bits => 4, addr_bits => 3) port map ( a =>DireccionVeinticinco, do=>Dato_Veinticinco_ROM); -- Type FSM_FF is (Estado1, Estado1); -- Signal S_FSM_FF: is FSM_FF; Process (clk,rst) begin if rising_edge (clk) then case S_FSM_FF is when Estado1 => if rst = '0' then reset_num<='0';S_FSM_FF<= Estado1; else reset_num<='0';S_FSM_FF<= Estado2; end if; when Estado2 => if rst='1' then reset_num<='0';S_FSM_FF<= Estado2; else reset_num<='1'; S_FSM_FF<= Estado1; end if; end case; end if; end process; Process (clk) begin if rising_edge(clk) then if reset_num='1' then Cuenta<= "00000000000000000000000000"; Bandera<='0'; else if Cuenta="10111110101111000010000000" then --1segundo Bandera<=not (Bandera); Cuenta<="00000000000000000000000000"; else if Enable='1' then Cuenta<=Cuenta+1; end if; end if; end if; end if; end process; Process (clk) begin if rising_edge (clk) then case S_FSM is when Num0 => if Bandera ='0' or reset_num='1' then Slides<="00000"; S_FSM<=Num0; else S_FSM<=Num1; end if; when Num1 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='1' then Slides<="00001"; S_FSM<=Num1; else S_FSM<=Num2; end if; end if; when Num2 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='0' then Slides<="00010"; S_FSM<=Num2; else S_FSM<=Num3; end if; end if; when Num3 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='1' then Slides<="00011"; S_FSM<=Num3; else S_FSM<=Num4; end if; end if; when Num4 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='0' then Slides<="00100"; S_FSM<=Num4; else S_FSM<=Num5; end if; end if; when Num5 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='1' then Slides<="00101"; S_FSM<=Num5; else S_FSM<=Num6; end if; end if; when Num6 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='0' then Slides<="00110"; S_FSM<=Num6; else S_FSM<=Num7; end if; end if; when Num7 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='1' then Slides<="00111"; S_FSM<=Num7; else S_FSM<=Num8; end if; end if; when Num8=> if reset_num='1' then S_FSM<=Num0; else if Bandera ='0' then Slides<="01000"; S_FSM<=Num8; else S_FSM<=Num9; end if; end if; when Num9 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='1' then Slides<="01001"; S_FSM<=Num9; else S_FSM<=Num10; end if; end if; when Num10 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='0' then Slides<="01010"; S_FSM<=Num10; else S_FSM<=Num11;--0 end if; end if; when Num11 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='1' then Slides<="01011"; S_FSM<=Num11; else S_FSM<=Num12;--0 end if; end if; when Num12 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='0' then Slides<="01100"; S_FSM<=Num12; else S_FSM<=Num13;--0 end if; end if; when Num13 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='1' then Slides<="01101"; S_FSM<=Num13; else S_FSM<=Num14;--0 end if; end if; when Num14 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='0' then Slides<="01110"; S_FSM<=Num14; else S_FSM<=Num15;--0 end if; end if; when Num15 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='1' then Slides<="01111"; S_FSM<=Num15; else S_FSM<=Num16;--0 end if; end if; when Num16 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='0' then Slides<="10000"; S_FSM<=Num16; else S_FSM<=Num17;--0 end if; end if; when Num17 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='1' then Slides<="10001"; S_FSM<=Num17; else S_FSM<=Num18;--0 end if; end if; when Num18 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='0' then Slides<="10010"; S_FSM<=Num18; else S_FSM<=Num19;--0 end if; end if; when Num19 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='1' then Slides<="10011"; S_FSM<=Num19; else S_FSM<=Num20;--0 end if; end if; when Num20 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='0' then Slides<="10100"; S_FSM<=Num20; else S_FSM<=Num21;--0 end if; end if; when Num21 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='1' then Slides<="10101"; S_FSM<=Num21; else S_FSM<=Num22;--0 end if; end if; when Num22 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='0' then Slides<="10110"; S_FSM<=Num22; else S_FSM<=Num23;--0 end if; end if; when Num23 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='1' then Slides<="10111"; S_FSM<=Num23; else S_FSM<=Num24;--0 end if; end if; when Num24 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='0' then Slides<="11000"; S_FSM<=Num24; else S_FSM<=Num25;--0 end if; end if; when Num25 => if reset_num='1' then S_FSM<=Num0; else if Bandera ='1' then Slides<="11001"; S_FSM<=Num25; else S_FSM<=Num0;--0 end if; end if; end case; end if; end process; process(DireccionCero,DireccionUno,DireccionDos,DireccionTres,DireccionCuatro, DireccionCinco,DireccionSeis,DireccionSiete,DireccionOcho,DireccionNueve,DireccionDiez, DireccionOnce,DireccionDoce,DireccionTrece,DireccionCatorce,DireccionQuince, DireccionDieciseis,DireccionDiecisiete,DireccionDieciocho,DireccionDiecinueve,DireccionVeinte, DireccionVeintiuno,DireccionVeintidos,DireccionVeintitres,DireccionVeinticuatro,Direccion Veinticinco, Dato_Cero_ROM,Dato_Uno_ROM,Dato_Dos_ROM,Dato_Tres_ROM,Dato_Cuatro_ROM,Dato_ Cinco_ROM,Dato_Seis_ROM,Dato_Siete_ROM,Dato_Ocho_ROM,Dato_Nueve_ROM,Dato_Diez_ ROM,Dato_Once_ROM,Dato_Doce_ROM,Dato_Trece_ROM,Dato_Catorce_ROM,Dato_Quince_ ROM,Dato_Dieciseis_ROM,Dato_Diecisiete_ROM,Dato_Dieciocho_ROM,Dato_Diecinueve_ ROM,Dato_Veinte_ROM,Dato_Veintiuno_ROM,Dato_Veintidos_ROM,Dato_Veintitres_ROM,Dato_ Veinticuatro_ROM,Dato_Veinticinco_ROM, Slides,DireccionROM,Dato_Leido_ROM,clk) begin if Rising_Edge (clk) then if Slides="00001" then --Uno DireccionUno<=DireccionROM; Dato_Leido_ROM<=Dato_Uno_ROM; elsif Slides="00010" then --Dos DireccionDos<=DireccionROM; Dato_Leido_ROM<=Dato_Dos_ROM; elsif Slides="00011" then --Tres DireccionTres<=DireccionROM; Dato_Leido_ROM<=Dato_Tres_ROM; elsif Slides="00100" then --Cuatro DireccionCuatro<=DireccionROM; Dato_Leido_ROM<=Dato_Cuatro_ROM; elsif Slides="00101" then --Cinco DireccionCinco<=DireccionROM; Dato_Leido_ROM<=Dato_Cinco_ROM; elsif Slides="00110" then --Seis DireccionSeis<=DireccionROM; Dato_Leido_ROM<=Dato_Seis_ROM; elsif Slides="00111" then --Siete DireccionSiete<=DireccionROM; Dato_Leido_ROM<=Dato_Siete_ROM; elsif Slides="01000" then --Ocho DireccionOcho<=DireccionROM; Dato_Leido_ROM<=Dato_Ocho_ROM; elsif Slides="01001" then --Nueve DireccionNueve<=DireccionROM; Dato_Leido_ROM<=Dato_Nueve_ROM; elsif Slides="01010" then --Diez DireccionDiez<=DireccionROM; Dato_Leido_ROM<=Dato_Diez_ROM; elsif Slides="01011" then --Once DireccionOnce<=DireccionROM; Dato_Leido_ROM<=Dato_Once_ROM; elsif Slides="01100" then --Doce DireccionDoce<=DireccionROM; Dato_Leido_ROM<=Dato_Doce_ROM; elsif Slides="01101" then --Trece DireccionTrece<=DireccionROM; Dato_Leido_ROM<=Dato_Trece_ROM; elsif Slides="01110" then --Catorce DireccionCatorce<=DireccionROM; Dato_Leido_ROM<=Dato_Catorce_ROM; elsif Slides="01111" then --Quince DireccionQuince<=DireccionROM; Dato_Leido_ROM<=Dato_Quince_ROM; elsif Slides="10000" then --Dieciseis DireccionDieciseis<=DireccionROM; Dato_Leido_ROM<=Dato_Dieciseis_ROM; elsif Slides="10001" then --Diecisiete DireccionDiecisiete<=DireccionROM; Dato_Leido_ROM<=Dato_Diecisiete_ROM; elsif Slides="10010" then --Dieciocho DireccionDieciocho<=DireccionROM; Dato_Leido_ROM<=Dato_Dieciocho_ROM; elsif Slides="10011" then --Diecinueve DireccionDiecinueve<=DireccionROM; Dato_Leido_ROM<=Dato_Diecinueve_ROM; elsif Slides="10100" then --Veinte DireccionVeinte<=DireccionROM; Dato_Leido_ROM<=Dato_Veinte_ROM; elsif Slides="10101" then --Veintuno DireccionVeintiuno<=DireccionROM; Dato_Leido_ROM<=Dato_Veintidos_ROM; elsif Slides="10110" then --Veintidos DireccionVeintidos<=DireccionROM; Dato_Leido_ROM<=Dato_Veintidos_ROM; elsif Slides="10111" then --Veintitres DireccionVeintitres<=DireccionROM; Dato_Leido_ROM<=Dato_Veintitres_ROM; elsif Slides="11000" then --Veinticuatro DireccionVeinticuatro<=DireccionROM; Dato_Leido_ROM<=Dato_Veinticuatro_ROM; elsif Slides="11001" then --Veinticinco DireccionVeinticinco<=DireccionROM; Dato_Leido_ROM<=Dato_Veinticinco_ROM; else --Cero DireccionCero<=DireccionROM; Dato_Leido_ROM<=Dato_Cero_ROM; end if; end if; end process; --This cuts the 50 Mhz clock in half to generate a 25 MHz pixel clock process(clk, reset) begin if (reset = '1') then clkdiv <= '0'; elsif (rising_edge(clk)) then clkdiv <= not clkdiv; end if; end process; --Runs the horizontal counter when it resets vertical counter is incremented counter_proc : process(clkdiv, reset) begin if (reset = '1') then hc <= "0000000000"; vc <= "0000000000"; elsif (rising_edge(clkdiv)) then if (hc = hpixels) then --If hc has reached the end of pixel count hc <= "0000000000"; if (vc = vlines) then -- if vc has reached end of line count vc <= "0000000000"; else vc <= vc + 1; end if; else hc <= hc + 1; -- no statement about vc, implied vc <= vc; end if; end if; end process; --DrawX <= hc; --DrawY <= vc; -- horizontal sync pulse is 96 pixels long at pixels 656-752 ---- Tpw=96 -- (signal is registered to ensure clean output waveform) hsync_proc : process (reset, clkdiv, hc) begin if (reset = '1') then hs <= '0'; elsif (rising_edge(clkdiv)) then if ((hc + 1) >= "1010010000" and (hc + 1) < "1011110000") then -- must check next value of hc --- entre 656 y 752 hs <= '0'; else hs <= '1'; end if; end if; end process; -- vertical sync pulse is 2 lines(800 pixels) long at line 490-491 -- (signal is registered to ensure clean output waveform) vsync_proc : process(reset, clkdiv, vc) begin if (reset = '1') then vs <= '0'; elsif (rising_edge(clkdiv)) then if ((vc + 1) = "111101010" or (vc + 1) = "111101011") then -- must check next value of vc vs <= '0'; else vs <= '1'; end if; end if; end process; -- only display pixels between horizontal 0-639 and vertical 0-479 (640x480) -- (This signal is registered within the DAC chip, so we can leave it as pure combinational logic here) display_proc : process(hc, vc,clkdiv, reset) begin -- if reset = '1' then -- rojo <= "000"; -- verde <= "000"; -- azul <= "00"; -- elsif rising_edge( clkdiv) then if rising_edge( clkdiv) then if ((hc >= "1010000000") or (vc >= "0111100000")) then --639 y 479 rojo <= "000"; verde <= "000"; azul <= "00"; else if ((hc >= X"E0" and hc <= X"1A0") and (vc >= X"90" and vc <= X"150")) then --(224,416) (144,336) --Vector1------------------------- IF (hc >=X"110" and hc<= X"128") and (vc>=X"C0" and vc<=X"CC") THEN --(272,272+12) (192,192+24) DireccionROM<="111"; rojo(2) <= Dato_Leido_ROM(3);rojo(1) <= Dato_Leido_ROM(3);rojo(0) <= Dato_Leido_ROM(3); verde <= "000";azul <= "00"; elsif (hc >=X"128" and hc<= X"140") and (vc>=X"C0" and vc<=X"CC") THEN --(272,272+12) (192,192+24) DireccionROM<="111"; rojo(2) <= Dato_Leido_ROM(2);rojo(1) <= Dato_Leido_ROM(2);rojo(0) <= Dato_Leido_ROM(2); verde <= "000";azul <= "00"; elsif (hc >=X"140" and hc<= X"158") and (vc>=X"C0" and vc<=X"CC") THEN --(272,272+12) (192,192+24) DireccionROM<="111"; rojo(2) <= Dato_Leido_ROM(1);rojo(1) <= Dato_Leido_ROM(1);rojo(0) <= Dato_Leido_ROM(1); verde <= "000";azul <= "00"; elsif (hc >=X"158" and hc<= X"170") and (vc>=X"C0" and vc<=X"CC") THEN --(272,272+12) (192,192+24) DireccionROM<="111"; rojo(2) <= Dato_Leido_ROM(0);rojo(1) <= Dato_Leido_ROM(0);rojo(0) <= Dato_Leido_ROM(0); verde <= "000";azul <= "00"; --Vector2------------------------- elsif (hc >=X"110" and hc<= X"128") and (vc>=X"CC" and vc<=X"D8") THEN DireccionROM<="110"; rojo(2) <= Dato_Leido_ROM(3);rojo(1) <= Dato_Leido_ROM(3);rojo(0) <= Dato_Leido_ROM(3); verde <= "000";azul <= "00"; elsif (hc >=X"128" and hc<= X"140") and (vc>=X"CC" and vc<=X"D8") THEN DireccionROM<="110"; rojo(2) <= Dato_Leido_ROM(2);rojo(1) <= Dato_Leido_ROM(2);rojo(0) <= Dato_Leido_ROM(2); verde <= "000";azul <= "00"; elsif (hc >=X"140" and hc<= X"158") and (vc>=X"CC" and vc<=X"D8") THEN DireccionROM<="110"; rojo(2) <= Dato_Leido_ROM(1);rojo(1) <= Dato_Leido_ROM(1);rojo(0) <= Dato_Leido_ROM(1); verde <= "000";azul <= "00"; elsif (hc >=X"158" and hc<= X"170") and (vc>=X"CC" and vc<=X"D8") THEN DireccionROM<="110"; rojo(2) <= Dato_Leido_ROM(0);rojo(1) <= Dato_Leido_ROM(0);rojo(0) <= Dato_Leido_ROM(0); verde <= "000";azul <= "00"; --Vector3------------------------- elsif (hc >=X"110" and hc<= X"128") and (vc>=X"D8" and vc<=X"E4") THEN DireccionROM<="101"; rojo(2) <= Dato_Leido_ROM(3);rojo(1) <= Dato_Leido_ROM(3);rojo(0) <= Dato_Leido_ROM(3); verde <= "000";azul <= "00"; elsif (hc >=X"128" and hc<= X"140") and (vc>=X"D8" and vc<=X"E4") THEN DireccionROM<="101"; rojo(2) <= Dato_Leido_ROM(2);rojo(1) <= Dato_Leido_ROM(2);rojo(0) <= Dato_Leido_ROM(2); verde <= "000";azul <= "00"; elsif (hc >=X"140" and hc<= X"158") and (vc>=X"D8" and vc<=X"E4") THEN DireccionROM<="101"; rojo(2) <= Dato_Leido_ROM(1);rojo(1) <= Dato_Leido_ROM(1);rojo(0) <= Dato_Leido_ROM(1); verde <= "000";azul <= "00"; elsif (hc >=X"158" and hc<= X"170") and (vc>=X"D8" and vc<=X"E4") THEN DireccionROM<="101"; rojo(2) <= Dato_Leido_ROM(0);rojo(1) <= Dato_Leido_ROM(0);rojo(0) <= Dato_Leido_ROM(0); verde <= "000";azul <= "00"; --Vector4------------------------- elsif (hc >=X"110" and hc<= X"128") and (vc>=X"E4" and vc<=X"F0") THEN DireccionROM<="100"; rojo(2) <= Dato_Leido_ROM(3);rojo(1) <= Dato_Leido_ROM(3);rojo(0) <= Dato_Leido_ROM(3); verde <= "000";azul <= "00"; elsif (hc >=X"128" and hc<= X"140") and (vc>=X"E4" and vc<=X"F0") THEN DireccionROM<="100"; rojo(2) <= Dato_Leido_ROM(2);rojo(1) <= Dato_Leido_ROM(2);rojo(0) <= Dato_Leido_ROM(2); verde <= "000";azul <= "00"; elsif (hc >=X"140" and hc<= X"158") and (vc>=X"E4" and vc<=X"F0") THEN DireccionROM<="100"; rojo(2) <= Dato_Leido_ROM(1);rojo(1) <= Dato_Leido_ROM(1);rojo(0) <= Dato_Leido_ROM(1); verde <= "000";azul <= "00"; elsif (hc >=X"158" and hc<= X"170") and (vc>=X"E4" and vc<=X"F0") THEN DireccionROM<="100"; rojo(2) <= Dato_Leido_ROM(0);rojo(1) <= Dato_Leido_ROM(0);rojo(0) <= Dato_Leido_ROM(0); verde <= "000";azul <= "00"; --Vector5------------------------- elsif (hc >=X"110" and hc<= X"128") and (vc>=X"F0" and vc<X"FC") THEN DireccionROM<="011"; rojo(2) <= Dato_Leido_ROM(3);rojo(1) <= Dato_Leido_ROM(3);rojo(0) <= Dato_Leido_ROM(3); verde <= "000";azul <= "00"; elsif (hc >=X"128" and hc<= X"140") and (vc>=X"F0" and vc<X"FC") THEN DireccionROM<="011"; rojo(2) <= Dato_Leido_ROM(2);rojo(1) <= Dato_Leido_ROM(2);rojo(0) <= Dato_Leido_ROM(2); verde <= "000";azul <= "00"; elsif (hc >=X"140" and hc<= X"158") and (vc>=X"F0" and vc<X"FC") THEN DireccionROM<="011"; rojo(2) <= Dato_Leido_ROM(1);rojo(1) <= Dato_Leido_ROM(1);rojo(0) <= Dato_Leido_ROM(1); verde <= "000";azul <= "00"; elsif (hc >=X"158" and hc<= X"170") and (vc>=X"F0" and vc<X"FC") THEN DireccionROM<="011"; rojo(2) <= Dato_Leido_ROM(0);rojo(1) <= Dato_Leido_ROM(0);rojo(0) <= Dato_Leido_ROM(0); verde <= "000";azul <= "00"; --Vector6------------------------- NO FUNCIONA elsif (hc >=X"110" and hc<= X"128") and (vc>=X"FC" and vc<=X"108") THEN DireccionROM<="010"; rojo(2) <= Dato_Leido_ROM(3);rojo(1) <= Dato_Leido_ROM(3);rojo(0) <= Dato_Leido_ROM(3); verde <= "000";azul <= "00"; elsif (hc >=X"128" and hc<= X"140") and (vc>=X"FC" and vc<=X"108")THEN DireccionROM<="010"; rojo(2) <= Dato_Leido_ROM(2);rojo(1) <= Dato_Leido_ROM(2);rojo(0) <= Dato_Leido_ROM(2); verde <= "000";azul <= "00"; elsif (hc >=X"140" and hc<= X"158") and (vc>=X"FC" and vc<=X"108") THEN DireccionROM<="010"; rojo(2) <= Dato_Leido_ROM(1);rojo(1) <= Dato_Leido_ROM(1);rojo(0) <= Dato_Leido_ROM(1); verde <= "000";azul <= "00"; elsif (hc >=X"158" and hc<= X"170") and (vc>=X"FC" and vc<=X"108") THEN DireccionROM<="010"; rojo(2) <= Dato_Leido_ROM(0);rojo(1) <= Dato_Leido_ROM(0);rojo(0) <= Dato_Leido_ROM(0); verde <= "000";azul <= "00"; --Vector7------------------------- elsif (hc >=X"110" and hc<= X"128") and (vc>=X"108" and vc<=X"114") THEN DireccionROM<="001"; rojo(2) <= Dato_Leido_ROM(3);rojo(1) <= Dato_Leido_ROM(3);rojo(0) <= Dato_Leido_ROM(3); verde <= "000";azul <= "00"; elsif (hc >=X"128" and hc<= X"140") and (vc>=X"108" and vc<=X"114") THEN DireccionROM<="001"; rojo(2) <= Dato_Leido_ROM(2);rojo(1) <= Dato_Leido_ROM(2);rojo(0) <= Dato_Leido_ROM(2); verde <= "000";azul <= "00"; elsif (hc >=X"140" and hc<= X"158") and (vc>=X"108" and vc<=X"114") THEN DireccionROM<="001"; rojo(2) <= Dato_Leido_ROM(1);rojo(1) <= Dato_Leido_ROM(1);rojo(0) <= Dato_Leido_ROM(1); verde <= "000";azul <= "00"; elsif (hc >=X"158" and hc<= X"170") and (vc>=X"108" and vc<=X"114") THEN DireccionROM<="001"; rojo(2) <= Dato_Leido_ROM(0);rojo(1) <= Dato_Leido_ROM(0);rojo(0) <= Dato_Leido_ROM(0); verde <= "000";azul <= "00"; --Vector8 ------------------------- elsif (hc >=X"110" and hc<= X"128") and (vc>=X"114" and vc<=X"120") THEN DireccionROM<="000"; rojo(2) <= Dato_Leido_ROM(3);rojo(1) <= Dato_Leido_ROM(3);rojo(0) <= Dato_Leido_ROM(3); verde <= "000";azul <= "00"; elsif (hc >=X"128" and hc<= X"140") and (vc>=X"114" and vc<=X"120") THEN DireccionROM<="000"; rojo(2) <= Dato_Leido_ROM(2);rojo(1) <= Dato_Leido_ROM(2);rojo(0) <= Dato_Leido_ROM(2); verde <= "000";azul <= "00"; elsif (hc >=X"140" and hc<= X"158") and (vc>=X"114" and vc<=X"120") THEN DireccionROM<="000"; rojo(2) <= Dato_Leido_ROM(1);rojo(1) <= Dato_Leido_ROM(1);rojo(0) <= Dato_Leido_ROM(1); verde <= "000";azul <= "00"; elsif (hc >=X"158" and hc<= X"170") and (vc>=X"114" and vc<=X"120") THEN DireccionROM<="000"; rojo(2) <= Dato_Leido_ROM(0);rojo(1) <= Dato_Leido_ROM(0);rojo(0) <= Dato_Leido_ROM(0); verde <= "000";azul <= "00"; else --Fuera de la primera vencidad=Negro rojo <= "000"; verde <= "000"; azul <= "00"; END IF; else --Fondo=Azul rojo <= "000"; verde <= "000"; azul <= "11"; end if; end if; end if; end process; --blank <= display; --pixel_clk <= clkdiv; end Behavioral; |
